Please use this identifier to cite or link to this item: http://ir.juit.ac.in:8080/jspui/jspui/handle/123456789/5886
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dc.contributor.authorSamtani, Deepali-
dc.contributor.authorPatel, Naman Kumar-
dc.contributor.authorGupta, Aditya-
dc.date.accessioned2022-08-18T11:16:30Z-
dc.date.available2022-08-18T11:16:30Z-
dc.date.issued2015-
dc.identifier.urihttp://ir.juit.ac.in:8080/jspui//xmlui/handle/123456789/5886-
dc.description.abstractThe Reversible Logic has received great attention in the past recent years due to its ability in reducing the power dissipation. Owing to its unique technique of one-to-one mapping between the inputs and the corresponding outputs, the reversible logic gates are now finding profound as well as promising applications in emerging growing fields such as Digital Signal Processing, Nanotechnology etc. The implementation of these logic circuits into electronic circuitry is based on CMOS Technology. Reversible logic is one of the most vital issue at present time and it has different areas for its application, those are low power CMOS, quantum computing, nanotechnology, cryptography, digital signal processing (DSP), communication, computer graphics etc. It is not possible to realize these applications without implementation of reversible logic. The main purposes of designing reversible logic are to decrease quantum cost, depth of the circuits and the number of garbage outputs. The reversible circuits form the basic building block of quantum computers as all quantum operations are reversible. In Reversible logic, designs of reversible circuits are presented that are optimized for the number of reversible gates and the garbage outputs. The optimization of the number of reversible gates is not sufficient since each reversible gate is of different computational complexity, and thus will have a different quantum cost and delay. While the computational complexity of a reversible gate can be measured by its quantum cost, the delay of a reversible gate is another parameter that can be optimized during the design of a reversible circuit.en_US
dc.language.isoenen_US
dc.publisherJaypee University of Information Technology, Solan, H.P.en_US
dc.subjectReversible logicen_US
dc.subjectDigital circuitsen_US
dc.subjectDigital signal processingen_US
dc.subjectComplementary metal-oxide semiconductoren_US
dc.titleDesign of Digital Circuits Based on Reversible Logicen_US
dc.typeProject Reporten_US
Appears in Collections:B.Tech. Project Reports

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